{"id":1879,"date":"2026-09-18T17:23:10","date_gmt":"2026-09-18T08:23:10","guid":{"rendered":"https:\/\/india-marketing.jp\/india-news\/verifaix-chip-verification\/"},"modified":"2026-09-18T17:23:10","modified_gmt":"2026-09-18T08:23:10","slug":"verifaix-chip-verification","status":"publish","type":"india-news","link":"https:\/\/india-marketing.jp\/en\/india-news\/verifaix-chip-verification\/","title":{"rendered":"Semiconductor Verification AI Firm VerifAIX Raises About JPY 780 Million \u2014 What Will It Be Used For First?"},"content":{"rendered":"
\nThis article is based on what we could verify As of September 18, 2026<\/strong> in public records and news reports from India. India revises its tax rules and regulations frequently, and the details here may have changed since. When making an actual business decision, please check the latest information with primary sources such as the ministries responsible and local experts.\n<\/div>\n\n\n

On September 16, 2026, Indian startup VerifAIX, which automates chip design verification, raised $5 million in seed funding. At $1 \u2248 \u00a5155 (as of September 2026), that's about JPY 780 million, equivalent to \u20b948 crore (480 million rupees, or about JPY 800 million at \u20b91 \u2248 \u00a51.66). For VerifAIX, founded in 2024, this is its first funding from institutional investors. The use of funds is narrowed to hiring more engineers across its three bases in the US, India, and Israel, and accelerating product development. For Japanese companies involved in semiconductor design, EDA, and contract verification, this offers material for gauging where India-originated deep tech is digging into the verification process.<\/p>\n\n

The Source News: VerifAIX Secures $5 Million in Its First Institutional Round<\/h2>\n

The round was co-led by Endiya Partners and Bluehill VC. This is VerifAIX's first funding from institutional investors. It was co-founded by three people: Madhulima Tewari (CEO), Kenneth Roe, and Avner Landver. The company explicitly states the funds will go toward accelerating product development, expanding customer adoption, growing its engineering team across the US, India, and Israel, and advancing its core technology, \"Formal Brain.\" What sets this apart from a mere funding announcement is that it disclosed not just the amount, but the specific investment target of extending automatic abstraction and decomposition capability to large-scale chip designs.<\/p>\n\n

Background: Ballooning Design Scale Is Making Verification a Bottleneck<\/h2>\n

Formal verification of chips is a method that mathematically confirms, exhaustively, that a design works as specified, and has the strength of catching flaws that simulation can't fully catch. On the other hand, the larger a chip's scale, the more the computational load of verification jumps up, and it easily becomes the rate-limiting step in development. VerifAIX is trying to solve this bottleneck by combining AI inference with deterministic, mathematically rigorous verification. Behind its ability to close its first institutional round just two years after founding is the broader trend of India trying to thicken the upstream base of semiconductor design and verification.<\/p>\n\n

What Part of Verification Does \"Formal Brain\" Take Over?<\/h2>\n

VerifAIX's \"Formal Brain\" is a mechanism that automatically carries out abstraction and decomposition so that large-scale chip designs can be handled. AI automatically breaks up what used to be manually divided verification targets, and bridges them to formal verification and simulation tools. The aim is to reduce the time engineers need to stay glued to the task, and to bring the method to bear on larger designs. Its three-base setup across the US, India, and Israel spreads development across regions with design talent and verification demand, showing a posture of positioning India as part of product development itself, not merely a development offshore.<\/p>\n\n

How it is being received locally and in the industry<\/h2>\n

Inc42 reported this round as VerifAIX's first funding from institutional investors. The reporting specifically highlights that it brought in investors Endiya Partners and Bluehill VC as co-leads just two years after founding, and that it disclosed the use of funds tied to product development and headcount across its three bases. What stands out is that it is framed not around an exaggerated future vision, but around the concrete problem of keeping verification in step with expanding design scale.<\/p>\n\n

Implications for Japanese Companies: How to Connect with India's Verification and Design Talent<\/h2>\n

Japanese semiconductor strength lies in equipment, materials, and back-end processes, but in the software-leaning process of design verification, Indian deep tech has already made its move first. The move by an Indian company to win a contract for assembling Japanese automotive chips is Indian companies winning contracts to assemble Japanese automotive chips<\/a> covered there, and both the manufacturing base and the designers are shifting toward India at the same time. The pattern of India-originated SaaS incorporating US AI is also India's MoEngage acquires a US AI company, reversing the usual flow<\/a> and visible in Rocketlane's Series C and agentic AI,<\/a> and verification AI, too, will come looking for a connection to Japanese design floors as part of this same current.<\/p>\n\n

Ripple Effects on the Market: AI Outsourcing and Deep-Tech Funding Point in the Same Direction<\/h2>\n

The move of a former Infosys chief launching into AI outsourcing was AI outsourcing venture from a former Infosys chief<\/a> covered there, and VerifAIX's funding round sits within the same broader flow of money gathering into India's AI and deep tech. Investment flowing into the plain but indispensable process of verification shows that India's semiconductor ecosystem is moving from a stage of prototyping and promotion into a stage of implementation.<\/p>\n\n

Practical information and related links<\/h2>\n